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Sheet目录3850

62页 63页 64页 65页 [66页]67页 68页 69页 70页

2007-2012 Microchip Technology Inc.

DS39778E-page 61

PIC18F87J11 FAMILY

TABLE 5-3:

INITIALIZATION CONDITIONS FOR ALL REGISTERS(4)

Register

Applicable Devices

Power-on Reset,

Brown-out Reset

MCLR Resets,

WDT Reset,

RESET

Instruction,

Stack Resets,

CM Resets

Wake-up via WDT

or Interrupt

TOSU

PIC18F6XJ1X PIC18F8XJ1X

---0 0000

---0 uuuu(1)

TOSH

PIC18F6XJ1X PIC18F8XJ1X

0000 0000

uuuu uuuu(1)

TOSL

PIC18F6XJ1X PIC18F8XJ1X

0000 0000

uuuu uuuu(1)

STKPTR

PIC18F6XJ1X PIC18F8XJ1X

00-0 0000

uu-0 0000

uu-u uuuu(1)

PCLATU

PIC18F6XJ1X PIC18F8XJ1X

---0 0000

---u uuuu

PCLATH

PIC18F6XJ1X PIC18F8XJ1X

0000 0000

uuuu uuuu

PCL

PIC18F6XJ1X PIC18F8XJ1X

0000 0000

PC + 2(2)

TBLPTRU

PIC18F6XJ1X PIC18F8XJ1X

--00 0000

--uu uuuu

TBLPTRH

PIC18F6XJ1X PIC18F8XJ1X

0000 0000

uuuu uuuu

TBLPTRL

PIC18F6XJ1X PIC18F8XJ1X

0000 0000

uuuu uuuu

TABLAT

PIC18F6XJ1X PIC18F8XJ1X

0000 0000

uuuu uuuu

PRODH

PIC18F6XJ1X PIC18F8XJ1X

xxxx xxxx

uuuu uuuu

PRODL

PIC18F6XJ1X PIC18F8XJ1X

xxxx xxxx

uuuu uuuu

INTCON

PIC18F6XJ1X PIC18F8XJ1X

0000 000x

0000 000u

uuuu uuuu(3)

INTCON2

PIC18F6XJ1X PIC18F8XJ1X

1111 1111

uuuu uuuu(3)

INTCON3

PIC18F6XJ1X PIC18F8XJ1X

1100 0000

uuuu uuuu(3)

INDF0

PIC18F6XJ1X PIC18F8XJ1X

N/A

POSTINC0

PIC18F6XJ1X PIC18F8XJ1X

N/A

POSTDEC0

PIC18F6XJ1X PIC18F8XJ1X

N/A

PREINC0

PIC18F6XJ1X PIC18F8XJ1X

N/A

PLUSW0

PIC18F6XJ1X PIC18F8XJ1X

N/A

FSR0H

PIC18F6XJ1X PIC18F8XJ1X

---- xxxx

---- 0000

---- uuuu

FSR0L

PIC18F6XJ1X PIC18F8XJ1X

xxxx xxxx

uuuu uuuu

WREG

PIC18F6XJ1X PIC18F8XJ1X

xxxx xxxx

uuuu uuuu

INDF1

PIC18F6XJ1X PIC18F8XJ1X

N/A

POSTINC1

PIC18F6XJ1X PIC18F8XJ1X

N/A

POSTDEC1

PIC18F6XJ1X PIC18F8XJ1X

N/A

PREINC1

PIC18F6XJ1X PIC18F8XJ1X

N/A

PLUSW1

PIC18F6XJ1X PIC18F8XJ1X

N/A

FSR1H

PIC18F6XJ1X PIC18F8XJ1X

---- xxxx

---- 0000

---- uuuu

FSR1L

PIC18F6XJ1X PIC18F8XJ1X

xxxx xxxx

uuuu uuuu

BSR

PIC18F6XJ1X PIC18F8XJ1X

---- 0000

---- uuuu

Legend: u

= unchanged; x = unknown; - = unimplemented bit, read as ‘0’; q = value depends on condition.

Shaded cells indicate conditions do not apply for the designated device.

Note 1:

When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are

updated with the current value of the PC. The STKPTR is modified to point to the next location in the

hardware stack.

When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt

vector (0008h or 0018h).

One or more bits in the INTCONx or PIRx registers will be effected (to cause wake-up).

See Table 5-2 for Reset value for specific conditions.

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